This is the documentation for the latest (main) development branch. If you are looking for the documentation of previous releases, use the drop-down menu on the left and select the desired version.

Zephyr Device-Tree Generation for AMD SoCs using Lopper

Introduction

This document provides the process of generating the Zephyr device-trees and board overlay files for AMD SoCs using the Lopper tool.

The Zephyr device-tree generation typically happens after the hardware design is compiled in Vivado and the system device-tree is generated using the SDTGen tool.

Lopper consumes the system device-tree and generates the Zephyr specific device-tree files that are compatible with the Zephyr RTOS framework.

Overview

The workflow for generating Zephyr device-trees involves the following steps:

1. Hardware Design Compilation: The hardware design is compiled in Vivado

2. System Device-Tree Generation: SDTGen tool generates the system device-tree from the compiled hardware design

3. Zephyr Device-Tree Generation: Lopper processes the system device-tree to create Zephyr-specific device-tree files

For more information on SDTGen and hardware handoff file can be found in the Xilinx System Device Tree Repository.

Hardware Design (Vivado) → SDTGen → System Device-Tree → Lopper → Zephyr Device-Tree

Supported Processors

Currently, the Zephyr device-tree generation supports the following AMD processor architectures:

• Microblaze RISC-V: RISC-V based soft processor core

• Cortex-A78: ARM high-performance processor

• Cortex-R52: ARM real-time processor

Detailed Instructions

The following sections provide comprehensive instructions for generating Zephyr device-trees for each supported processor type.

Prerequisites

Before proceeding with the device-tree generation, ensure you have:

• Lopper tool installed and accessible as per lopper prerequisite

• System device-tree files generated from your hardware design

Processor-Specific Documentation

Processor Guides:

• Microblaze RISC-V Zephyr Device-Tree Generation
  • Overview
  • Generation Process
  • Prerequisites
  • Example Workflow
  • Output Files
  • Known Issues
  • Troubleshooting
• Cortex-A78 Zephyr Device-Tree Generation
  • Overview
  • Generation Process
  • Platform-Specific Processor Names
  • Prerequisites
  • Example Workflow
  • Output Files
  • Key Features
  • Troubleshooting
• Cortex-R52 Zephyr Device-Tree Generation
  • Overview
  • Generation Process
  • Platform-Specific Processor Names
  • Prerequisites
  • Example Workflow
  • Output Files
  • Key Features
  • Troubleshooting

Additional Resources

• Zephyr Project Documentation

• AMD Embedded Documentation

Support

For issues and questions related to Zephyr device-tree generation for AMD SoCs, please refer to the project documentation or contact the development team.